Dissemination:Workshops:SMART10

4th Workshop on Statistical and Machine learning approaches to ARchitecture and compilaTion
(SMART'10)

January 23 or 24, 2010, Pisa, Italy

(co-located with HiPEAC 2010 Conference)

Program Chair:

• David Whalley
  Florida State University, USA

Program Organizers:

• Grigori Fursin
  INRIA, France
• John Cavazos
  University of Delaware, USA

Program Committee:

TBA

The rapid rate of architectural change and the large diversity of architecture features has made it increasingly difficult for compiler writers to keep pace with microprocessor evolution. This problem has been compounded by the introduction of multicores. Thus, compiler writers have an intractably complex problem to solve. A similar situation arises in processor design where new approaches are needed to help computer architects make the best use of new underlying technologies and to design systems well adapted to futureapplication domains.

Recent studies have shown the great potential of statistical machine learning and search strategies for compilation and machine design. The purpose of this workshop is to help consolidate and advance the state of the art in this emerging area of research. The workshop is a forum for the presentation of recent developments in compiler techniques and machine design methodologies based on space exploration and statistical machine learning approaches with the objective of improving performance, parallelism, scalability, and adaptability.

Topics of interest include (but are not limited to):

Machine Learning, Statistical Approaches, or Search applied to

• Empirical Automatic Performance Tuning
• Iterative Feedback-Directed Compilation
• Self-tuning Programs, Libraries and Language Extensions
• Dynamic Optimization/Split Compilation/Adaptive Execution
• Adaptive Parallelization
• Low-power Optimizations
• Adaptive Virtualization
• Performance Modeling
• Performance portability
• Adaptive Processor and System Architecture
• Architecture Simulation and Design Space Exploration
• Collective Optimization
• Self-tuning Computing Systems
• Other Topics relevant to Intelligent and Adaptive Compilers/Architectures/OS

Paper Submission Guidelines:

Submitted papers should be original and not published or submitted for publication elsewhere. Papers should use the LNCS format and should be 15 pages maximum. Manuscript preparation guidelines can be found at the LNCS specification web site (go to -> For Authors -> Information for LNCS Authors). Submission website will be available soon.

Important Dates:

Final deadline for submission:	November 7, 2009
Decision notification:	December 14, 2009
Workshop:	January 23 or 24, 2010 (half-day)

Previous Workshops:

• SMART'09
• SMART'08
• SMART'07