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<table cellspacing="0" cellpadding="5" border="0" width="100%" style="border: 1px solid rgb(0, 100, 159);">
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<td width="280" align="center">http://ctuning.org/wiki/images/logo_matmul1.gif</td>
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<td width="90%" align="center" valign="center" style="background: rgb(255, 255, 255) none repeat scroll 0% 0%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;">
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<font size="5">
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MILEPOST Project: MachIne learning for embedded programs optimization
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4th Workshop on Statistical and Machine learning approaches to ARchitecture and compilaTion<BR>
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(SMART'10)
</font>
</font>
<br><BR>
<br><BR>
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<font size="3" color="#FF0000">
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'''Keynote talk:''' ''Prof. Keith Cooper, Rice University, USA''
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</font>
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<br><BR>
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<font size="2">
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<i>
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'''January 24, 2010, Pisa, Italy'''<BR><BR>
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(co-located with [http://www.hipeac.net/conference HiPEAC 2010 Conference])
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</i>
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</font>
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<br>
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<font size="4">
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'''''[[Dissemination:Workshops:SMART10:Program|Final program]]'''''
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</font>
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</td>
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<td width="160" align="left">http://ctuning.org/wiki/images/logo_processor.jpg</td>
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</tr>
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<tr>
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<td align="left" valign="top">
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'''Program Chair:'''
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* ''[http://www.cs.fsu.edu/~whalley David Whalley]''<BR>Florida State University, USA
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'''Workshop Organizers:'''
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* ''[http://fursin.net/research Grigori Fursin]''<BR>INRIA, France
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* ''[http://www.cis.udel.edu/~cavazos John Cavazos]''<BR>University of Delaware, USA
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'''Steering Committee:'''<BR>
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* ''[http://www.caps-entreprise.com Francois Bodin]''<BR>CAPS Entreprise, France
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* ''[http://www.cis.udel.edu/~cavazos John Cavazos]''<BR>University of Delaware, USA
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* ''[http://users.elis.ugent.be/~leeckhou Lieven Eeckhout]''<BR>Ghent University, Belgium
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* ''[http://fursin.net/research Grigori Fursin]''<BR>INRIA, France
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* ''[http://www.dcs.ed.ac.uk/home/mob Michael O'Boyle]''<BR>University of Edinburgh, UK
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* ''[http://hpc.cs.uiuc.edu/~padua David Padua]''<BR>UIUC, USA
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* ''[http://www.lri.fr/~temam Olivier Temam]''<BR>INRIA, France
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* ''[http://vuduc.org Richard Vuduc]''<BR>Georgia Tech, USA
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'''Program Committee:'''<BR>
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* ''[http://www.prism.uvsq.fr/~bad Denis Barthou]''<BR>University of Versailles, France
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* ''[http://www.cs.utah.edu/~chunchen Chun Chen]''<BR>University of Utah, USA
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* ''[http://www.cs.pitt.edu/~childers Bruce Childers]''<BR>University of Pittsburgh, USA
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* ''[http://cobweb.ecn.purdue.edu/~eigenman Rudolf Eigenmann]''<BR>Purdue University, USA
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* ''[http://homepages.inf.ed.ac.uk/bfranke Björn Franke]''<BR>University of Edinburgh, UK
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* ''[http://polaris.cs.uiuc.edu/~garzaran Maria Garzaran]''<BR>UIUC, USA
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* ''[http://www.info.uni-karlsruhe.de/~glesner Sabine Glesner]''<BR>TU Berlin, Germany
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* ''[http://research.microsoft.com/en-us/people/ipek Engin Ipek]''<BR>Microsoft Research, USA
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* ''[http://www.ittc.ku.edu/~kulkarni Prasad Kulkarni]''<BR>University of Kansas, USA
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* ''[http://www.ece.udel.edu/~xli Xiaoming Li]''<BR>University of Delaware, USA
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* ''[http://ls12-www.cs.tu-dortmund.de/~marwedel Peter Marwedel]''<BR>TU Dortmund, Germany
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* ''[http://domino.research.ibm.com/comm/research_people.nsf/pages/bilha.index.html Bilha Mendelson]''<BR>IBM Haifa, Israel
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* ''[http://www.cs.utexas.edu/~mckinley Kathryn McKinley]''<BR>University of Texas, USA
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* ''[http://www.mcs.anl.gov/~norris Boyana Norris]''<BR>Argonne National Laboratory, USA
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* ''[http://optimizer.snu.ac.kr/ypaek Yunheung Paek]''<BR>Seoul National University, Korea
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* ''[http://www.ece.cmu.edu/~pueschel Markus Püschel]''<BR>Carnegie Mellon University, USA
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* ''[http://www.cs.txstate.edu/~aq10 Apan Qasem]''<BR>Texas State University, USA
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* ''[http://people.llnl.gov/schulz6 Martin Schulz]''<BR>LLNL, USA
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* ''[http://www.cs.wm.edu/~xshen Xipeng Shen]''<BR>College of William & Mary, USA
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* ''[http://www.cs.rice.edu/~linda Linda Torczon]''<BR>Rice University, USA
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* ''[http://www.cs.utsa.edu/~whaley R. Clint Whaley]''<BR>UTSA, USA
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* ''[http://www.ict.ac.cn/english Chengyong Wu]''<BR>ICT, China
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* ''[http://www.cs.utsa.edu/~qingyi Qing Yi]''<BR>UTSA, USA
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</td>
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<td colspan="2" align="left" valign="top">
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{{CShortCut|workshop-smart10}}
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 +
The rapid rate of architectural change and the large diversity
 +
of architecture features has made it increasingly difficult
 +
for compiler writers to keep pace with microprocessor evolution.
 +
This problem has been compounded by the introduction of multicores. 
 +
Thus, compiler writers have an intractably complex problem to solve.
 +
A similar situation arises in processor design where new approaches
 +
are needed to help computer architects make the best use of new underlying
 +
technologies and to design systems well adapted to future application domains.
 +
 +
Recent studies have shown the great potential of statistical machine
 +
learning and search strategies for compilation and machine design.
 +
The purpose of this workshop is to help consolidate and advance the state
 +
of the art in this emerging area of research. The workshop is a forum
 +
for the presentation of recent developments in compiler techniques
 +
and machine design methodologies based on space exploration
 +
and statistical machine learning approaches with the objective
 +
of improving performance, parallelism, scalability, and adaptability.
 +
 +
'''Topics of interest include (but are not limited to):'''<BR>
 +
<ul>
 +
Machine Learning, Statistical Approaches, or Search applied to
 +
</ul>
 +
* Empirical Automatic Performance Tuning
 +
* Iterative Feedback-Directed Compilation
 +
* Self-tuning Programs, Libraries and Language Extensions
 +
* Dynamic Optimization/Split Compilation/Adaptive Execution
 +
* Adaptive Parallelization
 +
* Low-power Optimizations
 +
* Adaptive Virtualization
 +
* Performance Modeling
 +
* Performance Portability
 +
* Adaptive Processor and System Architecture
 +
* Architecture Simulation and Design Space Exploration
 +
* Collective Optimization
 +
* Self-tuning Computing Systems
 +
* Other Topics relevant to Intelligent and Adaptive Compilers/Architectures/OS
 +
 +
'''Paper Submission Guidelines:'''<BR>
 +
<ul>
 +
Submitted papers should be original and not published or submitted for publication elsewhere. Papers should use the LNCS format and should be 15 pages maximum. Manuscript preparation guidelines can be found at the [http://www.springer.com/computer/lncs LNCS specification web site] (go to -> For Authors -> Information for LNCS Authors). Papers must be submitted in the PDF format.<BR><BR>
 +
An informal collection of the papers to be presented will be distributed at the workshop. All accepted papers will appear on the workshop website.
 +
</ul>
 +
 +
'''Submission website:'''<BR>
 +
<ul>https://cmt.research.microsoft.com/SMART2010/Default.aspx</ul>
 +
 +
'''Important Dates:'''<BR>
 +
<ul>
 +
{|border="0" cellpadding="4" cellspacing="0"
 +
|-
 +
|Deadline for submission:
 +
|<s>'''November 22, 2009'''</s>
 +
|-
 +
|Decision notification:
 +
|<s>'''December 18, 2009'''</s>
 +
|-
 +
|Deadline for camera-ready papers:
 +
|<s>'''January 6, 2010'''</s>
 +
|-
 +
|Workshop:
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| '''January 24, 2010''' (half-day)<BR>
 +
|}
 +
</ul>
 +
 +
'''Previous Workshops:'''<BR>
 +
* [http://www.hipeac.net/smart-workshop.html SMART'09]
 +
* [http://www.hipeac.net/smart-workshop-08.html SMART'08]
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* [http://www.hipeac.net/smart-workshop-07.html SMART'07]
 +
 +
'''Misc:'''<BR>
 +
* [http://ctuning.org/milepost-gcc MILEPOST GCC] - community-driven machine learning enabled self-tuning research compiler
 +
 +
'''Sponsors:'''<BR>
 +
::[http://www.uvsq.fr http://ctuning.org/wiki/images/logo_uvsq1.jpg] [http://www.hipeac.net http://ctuning.org/wiki/images/logo_hipeac1.gif]
 +
 +
</td>
 +
 +
</table>

Current revision

logo_matmul1.gif

4th Workshop on Statistical and Machine learning approaches to ARchitecture and compilaTion
(SMART'10)

Keynote talk: Prof. Keith Cooper, Rice University, USA

January 24, 2010, Pisa, Italy

(co-located with HiPEAC 2010 Conference)


Final program

logo_processor.jpg

Program Chair:

Workshop Organizers:

Steering Committee:

Program Committee:

 
Web shortcut: http://cTuning.org/workshop-smart10

The rapid rate of architectural change and the large diversity of architecture features has made it increasingly difficult for compiler writers to keep pace with microprocessor evolution. This problem has been compounded by the introduction of multicores. Thus, compiler writers have an intractably complex problem to solve. A similar situation arises in processor design where new approaches are needed to help computer architects make the best use of new underlying technologies and to design systems well adapted to future application domains.

Recent studies have shown the great potential of statistical machine learning and search strategies for compilation and machine design. The purpose of this workshop is to help consolidate and advance the state of the art in this emerging area of research. The workshop is a forum for the presentation of recent developments in compiler techniques and machine design methodologies based on space exploration and statistical machine learning approaches with the objective of improving performance, parallelism, scalability, and adaptability.

Topics of interest include (but are not limited to):

    Machine Learning, Statistical Approaches, or Search applied to
  • Empirical Automatic Performance Tuning
  • Iterative Feedback-Directed Compilation
  • Self-tuning Programs, Libraries and Language Extensions
  • Dynamic Optimization/Split Compilation/Adaptive Execution
  • Adaptive Parallelization
  • Low-power Optimizations
  • Adaptive Virtualization
  • Performance Modeling
  • Performance Portability
  • Adaptive Processor and System Architecture
  • Architecture Simulation and Design Space Exploration
  • Collective Optimization
  • Self-tuning Computing Systems
  • Other Topics relevant to Intelligent and Adaptive Compilers/Architectures/OS

Paper Submission Guidelines:

    Submitted papers should be original and not published or submitted for publication elsewhere. Papers should use the LNCS format and should be 15 pages maximum. Manuscript preparation guidelines can be found at the LNCS specification web site (go to -> For Authors -> Information for LNCS Authors). Papers must be submitted in the PDF format.

    An informal collection of the papers to be presented will be distributed at the workshop. All accepted papers will appear on the workshop website.

Submission website:

Important Dates:

    Deadline for submission: November 22, 2009
    Decision notification: December 18, 2009
    Deadline for camera-ready papers: January 6, 2010
    Workshop: January 24, 2010 (half-day)

Previous Workshops:

Misc:

  • MILEPOST GCC - community-driven machine learning enabled self-tuning research compiler

Sponsors:

logo_uvsq1.jpg logo_hipeac1.gif
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