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5th Workshop on Statistical and Machine learning approaches to ARchitecture and compilaTion
(SMART 2011)


Keynote talk: Markus Püschel, ETH Zürich, Switzerland
"Automatic Performance Tuning and Machine Learning"


April 3, 2011 (morning), Chamonix, France

(co-located with CGO 2011 Conference)


Final program

Program Chair:

Workshop Organizers:

Program Committee:

Steering Committee:

Web shortcut: http://cTuning.org/workshop-smart2011

The rapid rate of architectural change and the large diversity of architecture features has made it increasingly difficult for compiler writers to keep pace with microprocessor evolution. This problem has been compounded by the introduction of multicores. Thus, compiler writers have an intractably complex problem to solve. A similar situation arises in processor design where new approaches are needed to help computer architects make the best use of new underlying technologies and to design systems well adapted to future application domains.

Recent studies have shown the great potential of statistical machine learning and search strategies for compilation and machine design. The purpose of this workshop is to help consolidate and advance the state of the art in this emerging area of research. The workshop is a forum for the presentation of recent developments in compiler techniques and machine design methodologies based on space exploration and statistical machine learning approaches with the objective of improving performance, parallelism, scalability, and adaptability.

Topics of interest include (but are not limited to):

    Machine Learning, Statistical Approaches, or Search applied to
  • Empirical Automatic Performance Tuning
  • Iterative Feedback-Directed Compilation
  • Self-tuning Programs, Libraries and Language Extensions
  • Dynamic Optimization/Split Compilation/Adaptive Execution
  • Speculative and Adaptive Parallelization
  • Low-power Optimizations
  • Adaptive Virtualization
  • Performance Modeling and Portability
  • Adaptive Processor and System Architecture
  • Architecture Simulation and Design Space Exploration
  • Collective Optimization
  • Self-tuning Computing Systems
  • Other Topics relevant to Intelligent and Adaptive Compilers/Architectures/OS

Important Dates:

    Deadline for paper submission: February 7, 2011 EXTENDED TO February 17, 2011 (FINAL)
    Decision notification: March 7, 2011
    Deadline for camera-ready papers: March 25, 2011
    Workshop: April 3, 2011 (morning, half-day)

Paper Submission Guidelines:

    Submitted papers should be original and not published or submitted for publication elsewhere. Papers should use the LNCS format and should be 15 pages maximum. Manuscript preparation guidelines can be found at the LNCS specification web site (go to -> For Authors -> Information for LNCS Authors). Papers must be submitted in the PDF format using the workshop submission website.

    In addition to normal technical papers, please consider submitting "position paper" (2 to 15 pages). For example, a position paper could include your thoughts on compiler evolution, future infrastructure technology needs, use of adaptive techniques for the Cloud, etc.

    An informal collection of the papers to be presented will be distributed at the workshop. All accepted papers will appear on the workshop website.

Submission website:

Previous Workshops:

Misc:

  • pdf - SMART 2011 Flyer in pdf
  • txt - SMART 2011 CFP in text
  • cTuning CC - machine learning enabled compiler collection based on MILEPOST GCC and ICI

Sponsors:

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